1. Field of the Invention
This invention relates to semiconductor packaging technology, and more particularly, to a semiconductor package structure of the type utilizing lead frame as chip carrier.
2. Description of Related Art
A semiconductor package structure that utilizes lead frame as chip carrier is typically configured in such a manner as to mount the semiconductor chip on the die pad of the lead frame and then encapsulate the entire chip with a resin-made encapsulation body. The semiconductor chip is electrically coupled to the leads of the lead frame, and the leads are partly exposed to the outside of the encapsulation body for electrically coupling to an external printed circuit board. One drawback to this type of semiconductor package structure, however, is that, since the entire chip and the die pad are encapsulated within the encapsulation body, its heat-dissipation efficiency is considerably low.
One solution to the foregoing problem is to provide a heat sink or heat slug in the encapsulation body to help increase the heat-dissipation efficiency. One drawback to this solution, however, is that it significantly increase the overall weight of the package structure and would make the overall packaging process more complex to implement.
One solution to the problem of low heat-dissipation efficiency is to expose the die pad to the outside of the encapsulation body, such as the package configuration disclosed in the U.S. Pat. No. 5,252,783, which is briefly depicted in FIG. 5. As shown, the patented package configuration includes a lead frame 1 having a die pad 10 whose bottom surface 100 is exposed to the outside of the encapsulation body 2, allowing the chip-produced heat during operation to be dissipated directly through the die pad 10 to the atmosphere, so that no heat sink or heat slug is needed. This patented package configuration, however, has several drawbacks. First, since the bottom surface 100 of the die pad 10 should be exposed to the outside of the encapsulation body 2 and the edge of the bottom surface 100 would be rounded during stamping process, resin flash would easily occur at the peripheral edge of the bottom surface 100 of the die pad 10 during encapsulation process, which would adversely affect the quality and reliability of the finished product of the semiconductor package. Second, the post-treatments for removing the flashed resin require the use of sanding means or laser means, which would considerably increase the overall manufacture cost and may degrade the package quality. Third, the patented package configuration is unsuitable for use with large-size chips. This is because that when the die pad 10 is made larger in dimension, it would interfere the operation of the ejection pins used to eject the encapsulation body from the molds, undesirably causing the forming of a gap between the bottom surface of the die pad and the inner surface of the molds, which would then cause resin flash. Fourth, the exposed design for the die pad would easily allow ambient moisture to enter into the inside of the encapsulation body, which may degrade the internal circuitry of the semiconductor chip.
It is therefore an objective of this invention to provide a semiconductor package structure, which can help prevent resin flash during encapsulation process.
It is another objective of this invention to provide a semiconductor package structure, which allows no post-treatments to remove flashed resin so that the overall packaging process can be more cost-effective and less complex to implement.
It is still another objective of this invention to provide a semiconductor package structure, which allows no interference to the ejection pins.
It is yet another objective of this invention to provide a semiconductor package structure, which is suitable for use with large-size semiconductor chips.
It is still yet another objective of this invention to provide a semiconductor package structure, which can help prevent ambient moisture to enter into the inside of the encapsulation body.
In accordance with the foregoing and other objectives, the invention proposes a new semiconductor package structure. The semiconductor package structure of the invention comprises: a lead frame having a die pad and a plurality of leads, the die pad having a front surface and a bottom surface, with the bottom surface being formed with a cutaway portion at the peripheral edge thereof; a semiconductor chip mounted on the front surface of the die pad and electrically coupled to the leads; and an encapsulation body for encapsulating the semiconductor chip and part of the leads, with the bottom surface of the die pad being exposed to the outside of the encapsulation body. The cutaway portion can serve as a constricted passage when the die pad is clamped between a pair of encapsulating molds, so that the molding resin injected into the encapsulating molds would be slowed down in flow speed within the cutaway portion since the molding resin within the cutaway portion would be able to more quickly absorb the heat of the molds, thereby increasing its viscosity. As a result, the molding resin would less likely flash onto the bottom surface of the die pad. As a result, the finished semiconductor package structure would be more cost-effective to implement and more assured in quality and reliability.
The cutaway portion can be either formed in a single-step shape or a multi-step staircase-like shape, whose length is preferably from 0.4 mm to 1.2 mm and whose depth is preferably from 0.05 mm to 0.12 mm.